The ISP flash application will update your firmware. This is an ISP module for ATMEL Microcontroller that support ISP such AT89SXXXX. Atmel isp 6.7; Avr isp programmer software; Atmel usb isp version 3.0 driver; Program.
Custom Solutions – Automatically GeneratedXJFlash allows you to automatically generate customised programming solutions for the flash memory devices connected to FPGAs on your board.The functional capabilities of the FPGA are harnessed to provide the fastest possible programming speeds. XJFlash automatically generates a custom design for each FPGA/flash combination, allowing you to achieve the best programming times, whilst not requiring you to do any FPGA development.Whether you are using SPI, QSPI or parallel NOR flash connected to an FPGA from Altera, Xilinx, Microsemi or Lattice – XJFlash will provide you with a programming solution optimised for your board.A licensed version of the relevant FPGA manufacturer’s tools will be required during the configuration of XJFlash. Free versions are sufficient for many devices. Test IntegrationXJFlash is fully compatible with the rest of the XJTAG development system. All XJFlash programming can be run as part of an boundary scan test project. Configurable Flash ProgrammingIt doesn’t matter whether you need to program a single flash memory device, or multiple devices that are connected in series, to expand the address space, or in parallel, to make a wider data bus, you can use XJFlash to speed up your programming operations. Custom developmentXJFlash can also be used for standalone programming requirements including direct access to I²C and SPI busses or custom protocols such as Microchips ICSP.The required connections do not need to come from an FPGA on the target board.
Providing the protocol signals are available on a header on that board, it should be possible to use XJFlash to achieve fast programming as part of an XJTAG solution. Erase – The flash can be erased using one of two algorithms.
The basic erase will simply erase all blocks within a defined range (this may be the whole flash or just the space needed for the image to be programmed). The more intelligent erase will use the fact that it is quicker to read the flash than to erase it; as such it reads from each address and only starts erasing if some data is found. This step can be skipped if it is known that the flash will always be blank before it is programmed.Example time – intelligent erase enabled: 0.9 s with a device already erased, to 23 s with a fully programmed device (limited by erase time of device). Can I use XJFlash?In order to use XJFlash all of the data, address and control signals on the flash device(s) must be connected to an FPGA on the target board. This can be a configuration PROM, or a flash device connected to any general purpose I/O pin. These connections can be direct, indirect, dedicated or shared: Direct connections – YESThe flash is directly connected to the FPGA.
Indirect connections – YES. The flash is connected to the FPGA via a buffer. Some of the address signals are shared with the data signals and connected via a latch. There is another configurable device, such as a CPLD between the flash and the FPGA.Shared connections – YESThe flash is connected to the FPGA in one of the modes described above but these connections are shared with another device (such as a processor).
No connections – YES (with design changes)If your design contains an FPGA but the flash is not connected in any of the configurations described, it may be possible to use spare pins on the FPGA to establish connections to the flash. These connections would not be used in the mission mode of the board but would allow you to use XJFlash to perform fast flash programming. If your FPGA is a slave device on the same address/data bus as the flash, this may not require many extra signals. No FPGA – Not directlyUnfortunately, it is not possible to use XJFlash if there is no FPGA, but it may be possible to do fast flash programming using the debug interface on a processor – please to see if you can use this approach on your board.Alternatively, if it is possible to bring the connections of the flash to a header on the board, XJFlash fast programming can be performed directly via that connector. High-speed flash programming.
Fast firmware upgradeKey benefits. Cuts flash programming times. SPI, QSPI, parallel NOR flash devices supported. Support for NAND flash devices available on request. Shortens development cycles. No need for additional equipment. Can be used for fast firmware upgrade.
No FPGA development requiredFlexible Licensing Options. Hardware licence– held in the JTAG controller so you can use XJTAG on any number of PCs.– held on a networked license server available from anywhere in the world.